--- onnv-gate-b129/usr/src/lib/fm/topo/modules/i86pc/chip/chip_amd.c 2009-12-01 09:41:39.000000000 +0100 +++ onnv-gate-b129-sh-dtrace/usr/src/lib/fm/topo/modules/i86pc/chip/chip_amd.c 2011-03-17 05:38:51.000000000 +0100 @@ -145,11 +145,11 @@ /* * Elsewhere we have already returned for families less than 0xf. * This "generic" topology is adequate for all of family 0xf and - * for revisions A to D of family 0x10 (for the list of models + * for revisions A to E of family 0x10 (for the list of models * in each revision, refer to usr/src/uts/i86pc/os/cpuid_subr.c). - * We cover all family 0x10 models, till model 9. + * We cover all family 0x10 models, till model 0xA. */ - if (family > 0x10 || (family == 0x10 && model > 9)) + if (family > 0x10 || (family == 0x10 && model > 0xA)) return (1); if (topo_node_range_create(mod, mcnode, CHAN_NODE_NAME, 0, --- onnv-gate-b129/usr/src/uts/i86pc/os/cpuid_subr.c 2009-12-01 09:42:07.000000000 +0100 +++ onnv-gate-b129-sh-dtrace/usr/src/uts/i86pc/os/cpuid_subr.c 2011-03-17 05:35:14.000000000 +0100 @@ -64,10 +64,11 @@ * 1 for family 0xf, revs F and G * 2 for family 0x10 * 3 for family 0x11 - * Second index by (model & 0x3) for family 0fh - * or CPUID bits for later families + * 4 for family 0x14 + * Second index by (model & 0x3) for family 0fh, + * CPUID pkg bits (Fn8000_0001_EBX[31:28]) for later families. */ -static uint32_t amd_skts[4][8] = { +static uint32_t amd_skts[5][8] = { /* * Family 0xf revisions B through E */ @@ -124,6 +125,21 @@ X86_SOCKET_UNKNOWN, /* 0b101 */ X86_SOCKET_UNKNOWN, /* 0b110 */ X86_SOCKET_UNKNOWN /* 0b111 */ + }, + + /* + * Family 0x14 + */ +#define A_SKTS_4 4 + { + X86_SOCKET_FT1, /* 0b000 */ + X86_SOCKET_UNKNOWN, /* 0b001 */ + X86_SOCKET_UNKNOWN, /* 0b010 */ + X86_SOCKET_UNKNOWN, /* 0b011 */ + X86_SOCKET_UNKNOWN, /* 0b100 */ + X86_SOCKET_UNKNOWN, /* 0b101 */ + X86_SOCKET_UNKNOWN, /* 0b110 */ + X86_SOCKET_UNKNOWN /* 0b111 */ } }; @@ -131,7 +147,7 @@ uint32_t skt_code; char sktstr[16]; }; -static struct amd_sktmap_s amd_sktmap[15] = { +static struct amd_sktmap_s amd_sktmap[16] = { { X86_SOCKET_754, "754" }, { X86_SOCKET_939, "939" }, { X86_SOCKET_940, "940" }, @@ -146,6 +162,7 @@ { X86_SOCKET_G34, "G34" }, { X86_SOCKET_ASB2, "ASB2" }, { X86_SOCKET_C32, "C32" }, + { X86_SOCKET_FT1, "FT1" }, { X86_SOCKET_UNKNOWN, "Unknown" } }; @@ -220,20 +237,43 @@ /* * Rev C has models 4-6 (depending on L3 cache configuration) - * Give all of models 4-6 stepping range to rev C. + * Give all of models 4-6 stepping range 0-2 to rev C2. + */ + { 0x10, 0x04, 0x06, 0x0, 0x2, X86_CHIPREV_AMD_10_REV_C2, "C2", A_SKTS_2 }, + + /* + * Rev C has models 4-6 (depending on L3 cache configuration) + * Give all of models 4-6 stepping range >= 3 to rev C3. + */ + { 0x10, 0x04, 0x06, 0x3, 0xf, X86_CHIPREV_AMD_10_REV_C3, "C3", A_SKTS_2 }, + + /* + * Rev D has models 8 and 9 + * Give all of model 8 and 9 stepping 0 to rev D0. */ - { 0x10, 0x04, 0x06, 0x0, 0xf, X86_CHIPREV_AMD_10_REV_C, "C", A_SKTS_2 }, + { 0x10, 0x08, 0x09, 0x0, 0x0, X86_CHIPREV_AMD_10_REV_D0, "D0", A_SKTS_2 }, /* * Rev D has models 8 and 9 - * Give all of model 8 and 9 stepping range to rev D. + * Give all of model 8 and 9 stepping range >= 1 to rev D1. */ - { 0x10, 0x08, 0x09, 0x0, 0xf, X86_CHIPREV_AMD_10_REV_D, "D", A_SKTS_2 }, + { 0x10, 0x08, 0x09, 0x1, 0xf, X86_CHIPREV_AMD_10_REV_D1, "D1", A_SKTS_2 }, + + /* + * Rev E has models A and stepping 0 + * Give all of model A stepping range to rev E. + */ + { 0x10, 0x0A, 0x0A, 0x0, 0xf, X86_CHIPREV_AMD_10_REV_E, "E", A_SKTS_2 }, /* * =============== AuthenticAMD Family 0x11 =============== */ - { 0x11, 0x03, 0x3, 0x0, 0xf, X86_CHIPREV_AMD_11, "B", A_SKTS_3 }, + { 0x11, 0x03, 0x03, 0x0, 0xf, X86_CHIPREV_AMD_11_REV_B, "B", A_SKTS_3 }, + + /* + * =============== AuthenticAMD Family 0x14 =============== + */ + { 0x14, 0x01, 0x01, 0x0, 0xf, X86_CHIPREV_AMD_14_REV_B, "B", A_SKTS_4 }, }; static void --- onnv-gate-b129/usr/src/uts/intel/sys/x86_archext.h 2009-12-01 09:42:08.000000000 +0100 +++ onnv-gate-b129-sh-dtrace/usr/src/uts/intel/sys/x86_archext.h 2011-03-14 19:18:31.000000000 +0100 @@ -509,16 +509,36 @@ _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x10, 0x0001) #define X86_CHIPREV_AMD_10_REV_B \ _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x10, 0x0002) -#define X86_CHIPREV_AMD_10_REV_C \ +#define X86_CHIPREV_AMD_10_REV_C2 \ _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x10, 0x0004) -#define X86_CHIPREV_AMD_10_REV_D \ +#define X86_CHIPREV_AMD_10_REV_C3 \ _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x10, 0x0008) +#define X86_CHIPREV_AMD_10_REV_D0 \ + _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x10, 0x0010) +#define X86_CHIPREV_AMD_10_REV_D1 \ + _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x10, 0x0020) +#define X86_CHIPREV_AMD_10_REV_E \ + _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x10, 0x0040) /* * Definitions for AMD Family 0x11. */ -#define X86_CHIPREV_AMD_11 \ - _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x11, 0x0001) +#define X86_CHIPREV_AMD_11_REV_B \ + _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x11, 0x0002) + +/* + * Definitions for AMD Family 0x12. + */ +/* +#define X86_CHIPREV_AMD_12_REV_B \ + _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x12, 0x0002) +*/ + +/* + * Definitions for AMD Family 0x14. + */ +#define X86_CHIPREV_AMD_14_REV_B \ + _X86_CHIPREV_MKREV(X86_VENDOR_AMD, 0x14, 0x0002) /* @@ -557,7 +577,12 @@ #define X86_SOCKET_G34 _X86_SOCKET_MKVAL(X86_VENDOR_AMD, 0x000800) #define X86_SOCKET_ASB2 _X86_SOCKET_MKVAL(X86_VENDOR_AMD, 0x001000) #define X86_SOCKET_C32 _X86_SOCKET_MKVAL(X86_VENDOR_AMD, 0x002000) - +#define X86_SOCKET_FT1 _X86_SOCKET_MKVAL(X86_VENDOR_AMD, 0x004000) +/* + * #define X86_SOCKET_FM1 _X86_SOCKET_MKVAL(X86_VENDOR_AMD, 0x008000) + * #define X86_SOCKET_FP1 _X86_SOCKET_MKVAL(X86_VENDOR_AMD, 0x010000) + * #define X86_SOCKET_FS1 _X86_SOCKET_MKVAL(X86_VENDOR_AMD, 0x020000) + */ #if !defined(_ASM) #if defined(_KERNEL) || defined(_KMEMUSER)